1. Field of the Invention
The present invention relates to a thin film transistor, a flat panel display device including the same, and a method of fabricating the same, and, more particularly, to a thin film transistor that is capable of effectively controlling a current, a flat panel display device including the same, and a method of fabricating the same.
2. Description of the Related Art
In an active matrix type flat panel display device, for example, in an active matrix LCD (AMLCD) or an active matrix organic light emitting display (AMOLED) device, a thin film transistor (TFT) is used as a switching element. In particular, there are two TFTs in the AMOLED device, and one of the two TFTs is a switching TFT for carrying out on and off functions, and the other is a driving TFT for driving a pixel. In general, an N-type metal oxide semiconductor (NMOS) TFT is used as the switching TFT and a P-type MOS (PMOS) TFT is used as the driving TFT.
FIG. 1 is a plan view for schematically illustrating a typical TFT. Referring to FIG. 1, a gate electrode 200 crosses (or perpendicularly crosses or intersects) a center of a polycrystalline silicon layer pattern 100, and a source region 120 and a drain region 130 are formed at respective sides of the gate electrode 200. In addition, a channel region 110 is formed at a crossing (or an intersection) where the polycrystalline silicon layer pattern 100 and the gate electrode 200 cross each other.
A dry etching method is used to form the polycrystalline silicon layer pattern on a substrate at the time of fabricating the TFT. An edge of the polycrystalline silicon layer pattern is exposed to plasma damage during the dry etching process, and the etched edge surface is inclined as compared to a flat top surface of the polycrystalline silicon layer pattern at the time of depositing a subsequent gate insulating layer, so that the connection of the polycrystalline silicon pattern with the gate insulating layer is unstable and poor. An edge channel region and a main channel region have different flat band voltages due to the plasma damage during the dry etching process, which causes the TFT characteristics to be distorted. FIG. 2 is a graph showing current-voltage characteristics of the conventional TFT. An X curve in FIG. 2 shows an ideal current-voltage characteristic of the TFT, whereas a Y curve shows a hump phenomenon in that a channel is inverted at a low gate voltage Vg in low-voltage driving to cause a drain current Id to flow. Such a hump phenomenon causes a problem in that the TFT is turned on sooner than expected due to a concentrated electric field, which causes a display device to which the TFT is applied to mis-operate so that the image quality of the display device is degraded.